Showing 35 questions
// Fundamentals
Q01
What does a mixer do? Explain the principle of frequency translation.
EasyBasics

A mixer multiplies two signals — RF and LO — to produce outputs at their sum and difference frequencies. This is frequency translation.

RF = A·cos(2π·f_RF·t), LO = B·cos(2π·f_LO·t)
IF = |f_RF − f_LO| (wanted) and f_RF + f_LO (filtered by IF filter)

In a receiver, 2400 MHz RF mixes with 2300 MHz LO to produce 100 MHz IF — much easier to filter and amplify. Real mixers use a nonlinear element (diode, FET, transistor quad) to generate sum/difference products. A true linear multiplier would work but is impractical at GHz frequencies.

💡 A real mixer produces all products m×f_RF ± n×f_LO for integers m,n — not just the wanted (1,1). All others are spurs that must be filtered or suppressed by the mixer's balanced topology.
Q02
What is conversion loss? What is the theoretical minimum for a passive diode mixer?
EasyConversion Loss
CL = −10·log₁₀(P_IF/P_RF) dB (positive — higher = more loss)
Theoretical minimum (ideal square-wave LO): CL = 3.92 dB = 20·log₁₀(π/2)

The 3.92 dB limit comes from the Fourier series — the fundamental of a ±1 square wave is 2/π amplitude. Typical real values: single-balanced 5–7 dB, double-balanced ring 6–8 dB, active Gilbert cell −3 to +5 dB (can have conversion gain).

💡 Real diode mixers exceed 3.92 dB due to: diode series resistance, forward voltage drop, package parasitics, and sinusoidal (not square) LO waveform.
Q03
What is the image frequency? How does it cause interference and how is it rejected?
EasyImage
Wanted signal: f_RF = f_LO + f_IF
Image: f_image = f_LO − f_IF = 2·f_LO − f_RF
Image is always 2×f_IF away from the wanted signal

Both f_RF and f_image produce the same IF output — indistinguishable after downconversion. Rejection methods: (1) image reject filter (preselector) before the mixer, (2) higher IF moves image further away making filtering easier, (3) IQ image-reject mixer cancels image using 90° phase relationship.

💡 AM broadcast IF=455 kHz: image 910 kHz away — easy to filter. Low-IF Bluetooth IF=1 MHz: image only 2 MHz away — must be rejected by IQ balance accuracy (>35 dB required).
Q04
What is SSB vs DSB noise figure of a passive mixer? Which do you use in the Friis formula?
EasyNoise
NF_SSB = Conversion Loss (dB) — signal in one sideband, noise from both
NF_DSB = NF_SSB − 3 dB — both sidebands carry signal (direct-conversion, radiometers)

Always use SSB NF in the Friis cascade for a superheterodyne receiver. If a datasheet specifies DSB NF, add 3 dB before plugging into Friis. Confusing the two causes a systematic 3 dB budget error — extremely common in interviews and real designs.

💡 Mini-Circuits specifies most mixers as DSB NF. A "6.5 dB NF" mixer actually has 9.5 dB SSB NF. Always check the footnote on the datasheet.
⚡ RX Chain Designer — Friis cascade
Q05
What is LO-to-RF and LO-to-IF isolation? Why does each matter?
MediumIsolation

LO-to-RF isolation: How much the LO signal is attenuated appearing at the RF input port. Typical: 20–40 dB. Poor isolation causes LO re-radiation through the antenna, creating interference and violating spurious emission regulations. Critical in transmitters.

LO-to-IF isolation: How much LO appears at the IF output. Poor isolation puts a strong LO spur directly in the IF passband — especially damaging in direct-conversion where LO falls at DC/baseband. Double-balanced mixers achieve 20–40 dB better isolation than single-balanced designs.

💡 In direct-conversion receivers, LO leaking to the RF port reflects from nearby objects, re-enters the mixer, and produces a DC component at baseband — saturating the baseband amplifiers. This "LO self-mixing" DC offset is the primary practical problem of zero-IF architecture.
Q06
What is mixer P1dB (compression point)? What causes it and how does it relate to LO drive level?
MediumLinearity
IIP1dB: RF input power where conversion gain drops by 1 dB from small-signal value
Rule of thumb: IIP1dB ≈ LO_drive − 10 to 15 dB

At high RF input levels the diodes spend increasing time in a nonlinear region — the RF signal is large enough to disturb the LO-driven switching threshold. The diodes no longer switch cleanly, conversion efficiency drops, gain compresses. Higher LO drive makes it harder for the RF to perturb the switching threshold → higher P1dB. Every 1 dB more LO power gives ~1 dB more IIP1dB.

💡 A strong blocker compressing the mixer simultaneously reduces conversion gain for the weak wanted signal — this is desensitisation. Design the mixer to operate at least 10 dB below P1dB under worst-case blocker conditions.
Q07
What is IIP3 of a mixer? For P_in = −20 dBm, IIP3 = +10 dBm, CL = 7 dB — find IM3 output power and IM3/fundamental ratio.
MediumLinearity
IM3_out = 3×P_in − 2×IIP3 + CG (all dBm, CG = −CL = −7 dB)
= 3(−20) − 2(10) + (−7) = −60−20−7 = −87 dBm
Fundamental_out = −20+(−7) = −27 dBm
IM3 ratio = −87−(−27) = −60 dBc

Quick form: IM3 is 2×(IIP3−P_in) dBc below fundamental = 2×(10−(−20)) = 60 dBc ✓
💡 Every 1 dB increase in LO power improves IIP3 by ~1 dB and IM3 rejection by 2 dB. Spending more LO power on the mixer is the most reliable way to improve system linearity at the downconversion stage.
⚡ RX Chain Designer — cascaded IIP3
Q08
What are spurious products? Write the general formula and identify the most dangerous spur for f_RF=900 MHz, f_LO=800 MHz.
HardSpurs
f_spur = |m×f_RF ± n×f_LO| for integers m,n ≥ 0   Order = |m|+|n|
Wanted (1,1): |900−800| = 100 MHz IF
Most dangerous — half-IF spur: interferer at f_LO+f_IF/2 = 850 MHz
2×850 − 2×800 = 100 MHz → falls exactly in IF band ✗

The half-IF spur is second-order (m=2, n=2) — requiring 2nd harmonics of both RF and LO. A double-balanced mixer suppresses even harmonics, greatly reducing it. It cannot be moved by choosing a different IF — it is always at f_LO + f_IF/2, making preselector filtering and high IIP2 the only solutions.

💡 GSM receivers (IF=270 kHz) have the half-IF spur source at 135 kHz from the LO — inside the adjacent channel. This drove intensive 1990s research into high-IIP2 mixer design and is why double-balanced Gilbert cells are universal in cellular chipsets.
// Mixer Topologies
Q09
Compare single-balanced, double-balanced and triple-balanced mixers. What spurs does each cancel?
MediumTopology

Unbalanced (1 diode): No cancellation. All products m×RF ± n×LO present at IF. Poor isolation. Lowest cost.

Single-balanced (2 diodes + 1 balun): Even harmonics of one port cancel at IF. LO-to-IF or RF-to-IF isolation improved by 15–25 dB. Common in balanced detectors.

Double-balanced ring (4 diodes + 2 baluns): Even harmonics of both RF and LO cancel. Only odd×odd products survive: (1,1),(1,3),(3,1)… Excellent isolation (30–60 dB) at all ports. Standard for most RF applications.

Triple-balanced (8 diodes + 3 baluns): Even IF harmonics also cancel. Extremely wideband. Used in test equipment and EW receivers requiring the widest dynamic range.

💡 Double-balanced ring mixer is the workhorse of RF engineering — millions shipped annually in SMT packages. The transformers are tiny ferrite cores wound with wire, costing $2–50 in production quantities.
Q10
What is a Gilbert cell mixer? Advantages and disadvantages vs the diode ring?
MediumTopology

The Gilbert cell uses a differential transconductance pair (RF port → differential current) and a four-transistor switching quad (steered by LO) that multiplies the current by ±1 at the LO rate. The IF current is converted to voltage by load resistors.

Advantages: Conversion gain (+5 to +15 dB), fully differential (excellent isolation), integrable in CMOS/HBT without transformers, low LO drive power.

Disadvantages vs diode ring: Lower IIP3, higher NF (10–20 dB vs 6–8 dB for DBM), requires DC power (5–20 mW), significant 1/f noise (damaging in direct-conversion), lower maximum operating frequency.

💡 Every WiFi, LTE and 5G handset uses a Gilbert cell IQ mixer. The LNA output at −80 to −50 dBm is too weak for a diode ring to switch cleanly — the Gilbert cell's gain overcomes this. Diode rings are preferred in test instruments and base stations where linearity and isolation matter more than integration.
Q11
What is a subharmonic mixer (SHM)? When is it used and what are the design tradeoffs?
HardTopology
2×SHM: IF = f_RF − 2×f_LO (LO runs at HALF the RF frequency)
77 GHz radar: f_LO=38.5 GHz (feasible in 28nm CMOS) vs 76 GHz fundamental (very difficult)
Anti-parallel diode pairs: short even LO harmonics, pass odd harmonics → 2nd harmonic mixes

Used at mmWave (60 GHz, 77 GHz, 300 GHz) where generating a high-power clean LO at the full RF frequency is impractical. Tradeoffs: 5–10 dB more conversion loss than fundamental, higher LO drive needed, more complex spur analysis (products at m×f_RF ± n×2×f_LO).

💡 All production 77 GHz ADAS radar chips use 2×SHM. A 38.5 GHz VCO drives both TX (via a frequency doubler) and RX (via SHM) — one VCO serves the entire transceiver, and LO phase noise cancels between TX and RX, improving target detection sensitivity.
// IQ Mixers and Direct Conversion
Q12
What is an IQ mixer? What information does it provide that a single mixer cannot?
MediumIQ Mixer
I: RF × cos(ω_LO·t) → ½·cos(Δω·t) after LPF
Q: RF × sin(ω_LO·t) → ½·sin(Δω·t) after LPF
Complex baseband: I + jQ = ½·e^{jΔωt} — full amplitude AND phase

A single mixer loses phase information and cannot distinguish signals above vs below the LO. The IQ mixer's quadrature path provides the complete complex baseband representation, enabling: image rejection (signals above/below LO distinguishable by I/Q phase relationship), direct demodulation of QAM/OFDM, and zero-IF operation.

💡 Without IQ, direct-conversion is impossible — setting f_LO=f_RF with a single mixer produces DC regardless of the signal modulation. The IQ structure is what makes zero-IF receivers work at all.
Q13
What is IQ imbalance? How does amplitude and phase error affect image rejection and EVM?
MediumIQ Mixer
IRR = (1 + A² + 2A·cosφ) / (1 + A² − 2A·cosφ)
A = linear amplitude ratio (ideal=1), φ = phase error (ideal=0)
A=1, φ=1°: IRR≈35 dB   A=0.9, φ=0°: IRR≈26 dB   A=1, φ=5°: IRR≈21 dB

Amplitude imbalance makes the signal constellation elliptical; phase imbalance rotates points asymmetrically. Both degrade image rejection and EVM. 5G NR 256-QAM requires EVM < 3.5%, demanding phase imbalance <0.3° — achievable only with digital calibration that measures imbalance and applies inverse correction in DSP.

💡 The denominator (1+A²−2A·cosφ) → 0 as both errors → 0. Perfect balance gives IRR→∞. Amplitude and phase errors compound, so both must be tightly controlled simultaneously.
Q14
Calculate IRR for an IQ mixer with 0.5 dB amplitude imbalance and 2° phase error.
HardIQ Mixer
A = 10^(0.5/20) = 1.0593   φ = 2° → cosφ = 0.99939
Numerator: 1 + 1.0593² + 2×1.0593×0.99939 = 1 + 1.122 + 2.117 = 4.239
Denominator: 1 + 1.122 − 2.117 = 0.005
IRR = 4.239/0.005 = 848 → 10·log₁₀(848) = 29.3 dB

29.3 dB hardware IRR is insufficient for LTE (requires 40+ dB). Digital IQ correction applied at startup typically improves IRR to 50–70 dB by measuring the imbalance coefficients and applying the inverse in DSP.

💡 The tiny denominator (~0.005) shows how sensitive IRR is to small imbalances. The numerator/denominator ratio of ~850:1 — just 0.5 dB and 2° error. This is why IQ calibration is mandatory in every production cellular and WiFi chipset.
Q15
What is direct-conversion (zero-IF) receiver? Advantages over superheterodyne and specific failure modes.
HardArchitecture

f_LO = f_RF — signal converts directly to baseband in one IQ mixing step. No IF filter needed.

Advantages: No image frequency problem. No IF SAW/crystal filter (saves cost and PCB area). Fully integrable in CMOS. Simpler architecture. Channel selection done by software-programmable baseband LPF.

Specific failure modes:

  • DC offset: LO self-mixing produces DC at baseband, saturating ADC. Solved by adaptive cancellation or AC coupling.
  • 1/f (flicker) noise: Transistor flicker noise peaks at DC — exactly where the wanted signal now lives. Solved by PMOS switches or chopping techniques.
  • IQ imbalance: Gain/phase mismatch causes image interference and EVM degradation. Solved by digital calibration.
  • IIP2: IM2 from two blockers falls at their difference frequency — in-band. Requires IIP2 > +50 dBm.
  • LO pulling: TX signal in FDD can injection-lock or frequency-pull the VCO.
💡 Despite all these problems, direct conversion won the handset battle ~2005 by eliminating the costly IF SAW filter. Every smartphone, WiFi and IoT radio now uses it, solving the problems digitally rather than with analog components.
// Receiver Architectures and LO Design
Q16
Compare superheterodyne, direct-conversion and low-IF receiver architectures. When do you choose each?
MediumArchitecture

Superheterodyne: Best selectivity and sensitivity, needs off-chip IF filter. Best performance. Use for: base stations, radar, test instruments, GPS — anywhere performance beats cost and size.

Direct conversion: Best integration, lowest cost, DC offset/1/f/IIP2 problems requiring digital solutions. Use for: handsets, WiFi, Bluetooth, IoT — mass-market devices where integration and cost dominate.

Low-IF: IQ mixing to a small IF (1–10 MHz). Avoids DC offset and 1/f noise problems. Image is the adjacent channel — rejected by IQ balance (>35 dB required). Use for: Bluetooth classic, ZigBee, DECT — standards where DC offset is a problem but full direct-conversion is difficult.

💡 The fundamental choice: buy performance with an analog IF filter (superhet) or buy integration by solving everything digitally (direct conversion/low-IF). Each CMOS generation tips the balance further toward digital solutions as digital processing gets cheaper and faster.
Q17
What is the half-IF spur? How is it generated and suppressed?
HardSpurs
Interferer at f_int = f_LO + f_IF/2
2×f_int − 2×f_LO = f_IF → lands exactly in IF band
Second-order product — requires high IIP2 for suppression, not IIP3

A strong interferer at f_LO + f_IF/2 has its second harmonic at 2f_LO + f_IF. Mixing with the second harmonic of the LO gives exactly the IF. This cannot be moved by changing IF — it is always at f_LO + f_IF/2.

Suppression: High IIP2 (double-balanced structure cancels even harmonics), preselector filter attenuating f_LO+f_IF/2, higher IF frequency, fully balanced LO drive eliminating even LO harmonics.

💡 The half-IF spur drove intensive 1990s research into high-IIP2 mixer design for GSM. It remains relevant today wherever narrowband standards use low IF frequencies with strong adjacent-channel interferers.
Q18
Describe Hartley and Weaver image-reject architectures. What are the key limitations of each?
HardArchitecture

Hartley: RF → IQ mixing → 90° phase shift on one IF path → add. Image cancels because the 90° IF shift reverses its relative phase. Limitation: the 90° IF phase shifter (Hilbert filter or polyphase network) must be accurate across the full IF bandwidth — difficult to achieve over >20% bandwidth. Sensitive to amplitude, phase AND IF phase shifter accuracy simultaneously.

Weaver: First IQ stage → first IF → second IQ stage at f_LO2=f_IF1 → subtract. Replaces the wideband 90° IF phase shifter with a second mixing stage. Limitation: introduces a second image at f_LO1±f_LO2±f_IF2 that must also be rejected. Requires two LO frequencies.

Hartley IRR limited by: amplitude balance + phase balance + IF phase shifter accuracy
Weaver IRR limited by: amplitude/phase balance of BOTH IQ stages
💡 Neither is used in modern handsets — digital IQ correction in direct-conversion achieves >50 dB IRR at lower cost. Both still appear in high-performance microwave receivers (spectrum analysers, VNAs) requiring analog IRR of 70+ dB beyond ADC dynamic range limits.
Q19
What LO drive levels do diode mixers require? What happens with too low or too high LO power?
MediumLO Drive
Level 7 (+7 dBm): IIP3 ≈ −3 to +3 dBm (standard receiver mixer)
Level 13 (+13 dBm): IIP3 ≈ +3 to +7 dBm (base station front-end)
Level 17 (+17 dBm): IIP3 ≈ +7 to +13 dBm (high-linearity, EW)
Rule: IIP3 ≈ LO_drive − 10 dB

Too low LO: Diodes not fully switched — conversion loss rises 3–8 dB, NF degrades equally, IIP3 drops dramatically. The mixer enters a "partial switching" regime generating many extra spurs.

Too high LO: Diodes saturate — no further performance gain. Excess power heats the package. LO harmonics become stronger. Going 3–6 dB above the rated level is generally safe and sometimes slightly improves IIP3.

💡 The LO driver amplifier is often the largest power consumer in the receive chain — a deliberate design choice to maximise linearity and IIP3. Spending more power on LO drive is the most reliable way to improve system IIP3.
Q20
What is LO phase noise and reciprocal mixing? How does a strong blocker degrade sensitivity via this mechanism?
MediumPhase Noise
Reciprocal mixing noise floor:
P_noise = P_blocker(dBm) + LO_PN(dBc/Hz at Δf) + 10·log₁₀(BW)
Example: P_blocker=−30 dBm, LPN=−120 dBc/Hz at 1 MHz, BW=200 kHz:
P_noise = −30+(−120)+53 = −97 dBm — near the thermal noise floor

A strong interferer at frequency offset Δf from the wanted signal mixes with the LO phase noise skirt at that same offset Δf, down-converting noise energy into the IF band. This raises the effective noise floor above thermal, desensitising the receiver even if the interferer is outside the IF filter passband.

💡 Cellular base stations need VCOs with phase noise of −140 to −160 dBc/Hz at the duplex offset. A strong TX signal from an adjacent sector would otherwise raise the RX noise floor via reciprocal mixing and destroy receiver sensitivity.
Q21
What is IIP2? Why does direct-conversion LTE require IIP2 > +50 dBm?
HardLinearity
Two blockers at f1, f2: IM2 products at |f1−f2| and f1+f2
In direct conversion: |f1−f2| falls inside baseband — cannot be filtered
IM2 power = 2×P_in − IIP2 (dBm)

In a zero-IF receiver, IM2 from two adjacent-channel blockers falls directly in the baseband signal band, unlike IIP3 products which can be moved by adjusting blocker spacing. LTE requires operation with −15 dBm blockers: IM2 = 2×(−15)−50 = −80 dBm — just at the thermal noise floor for a 20 MHz channel, requiring IIP2 > +50 dBm.

💡 IIP2 calibration is mandatory in every production LTE chip. Factory trimming adjusts mixer bias or LO balance to maximise IIP2, then stores correction values in OTP memory. Without this, production spread in transistor characteristics reduces IIP2 by 20–30 dB below the nominal design value.
// Quick-Fire Questions
Q22
What is high-side vs low-side LO injection? Effect on IF spectrum?
EasyBasics
Low-side: f_LO < f_RF → IF = f_RF−f_LO (spectrum NOT inverted)
High-side: f_LO > f_RF → IF = f_LO−f_RF (spectrum IS inverted)

With high-side injection, a signal at a higher RF frequency appears at a lower IF frequency — the IF spectrum is a mirror image. This must be corrected in demodulation (SSB sidebands swap, FM stereo pilot position inverts). Low-side injection is generally preferred to avoid this complication.

💡 In dual-conversion superhet, the total number of high-side injection stages must be even — otherwise the overall IF spectrum is inverted, flipping SSB voice unintelligible and disrupting stereo subcarrier decoding.
Q23
What is an upconverting mixer (modulator)? Key differences from a downconverter?
EasyTransmitter

An upconverter translates a baseband or IF signal to a higher RF frequency for transmission. The same hardware works — a mixer is reciprocal. Output contains both sum and difference; a BPF selects the wanted upper sideband at f_LO + f_IF.

Key differences in TX use: Much higher signal levels (+0 to +20 dBm). Linearity and spectral purity (spurious emissions) are paramount. Noise figure is irrelevant. LO leakage at the RF port contributes to spurious emissions violating regulatory masks.

💡 In a direct-conversion IQ modulator, any IQ imbalance creates an unwanted image sideband in the transmitted spectrum ("image sideband") that must be cancelled to <−40 dBc by digital predistortion — a key 5G NR transmitter calibration requirement.
Q24
What is AM-to-PM conversion in a mixer? Why does it matter for OFDM signals?
MediumNonlinearity
AM-PM coefficient K [°/dB]: Δφ = K × ΔA_dB   EVM ≈ Δφ(rad) × 100%
K=2°/dB, OFDM PAPR=8 dB → phase error=16° → EVM≈28% — catastrophic

Amplitude variations of the RF input cause phase rotations at the IF output due to nonlinear phase response of the switching transistors or diodes. OFDM signals (WiFi, LTE, 5G NR) have 8–12 dB PAPR — large instantaneous amplitude swings. Even small AM-PM coefficients produce significant EVM at peak amplitude moments.

💡 5G NR 256-QAM requires EVM < 3.5%. If the mixer has K=0.5°/dB and OFDM PAPR=8 dB, phase error = 4° → EVM contribution ≈7% — already over the limit from this alone. This is why 5G transmitters use digital predistortion (DPD) to linearise both amplitude and AM-PM of the complete TX chain.
Q25
Passive CMOS mixer vs Gilbert cell — compare NF, IIP3, power and 1/f noise.
HardCMOS Mixer
Passive CMOS: CL≈3–5 dB, NF≈3–5 dB, IIP3≈+5 to +15 dBm, P≈0 mW, 1/f noise: excellent
Active Gilbert: CG=+5 to +15 dB, NF=10–20 dB, IIP3=−5 to +5 dBm, P=5–20 mW, 1/f noise: poor

Passive CMOS uses four NMOS switches with no DC bias — either fully ON (low resistance) or OFF. No DC current means zero 1/f noise contribution — critical for direct-conversion where the signal lives near DC. Followed by a TIA (transimpedance amplifier) in "current-mode" architecture dominant since ~2010.

💡 CMOS scaling made passive mixers practical: in 90 nm CMOS, NMOS switch ON-resistance <50 Ω → acceptable conversion loss. In older 250 nm CMOS, switch resistance was too high. Technology scaling inadvertently solved the passive mixer's main limitation, causing the architecture shift around 2005–2010.
Q26
What is the TX leakage / self-mixing problem in FDD handsets? How does it degrade receiver sensitivity?
HardFDD Systems
P_noise_IF = P_TX_leakage + LO_PN(at duplex offset Δf) + 10·log₁₀(BW)
P_TX_leak=−30 dBm, LPN=−140 dBc/Hz at 45 MHz, BW=10 MHz:
P_noise = −30+(−140)+70 = −100 dBm — at the thermal noise floor

In FDD (TX and RX simultaneously on different frequencies), TX power leaks through the duplexer (−20 to −40 dBm at RX LNA input). This TX leakage mixes with RX LO phase noise at the duplex frequency offset, creating a noise component in the IF band that raises the effective noise floor and reduces sensitivity.

💡 LTE UE sensitivity specs are tested with TX simultaneously transmitting at +23 dBm (200 mW). Meeting sensitivity under this condition requires duplexer with 50–60 dB TX–RX isolation AND LO phase noise <−140 dBc/Hz at the duplex offset — simultaneously, on a chip smaller than a fingernail.
Q27
How do you measure IIP3 of a mixer using the 2-tone test?
MediumMeasurement
Apply f1, f2 (closely spaced, same power P_in) → measure P_fund and P_IM3 at IF
IIP3 = P_in + (P_fund − P_IM3)/2
Verification: increase P_in by 2 dB → P_IM3 must increase by 6 dB (3:1 slope confirms 3rd-order)

Setup: f1=900.1 MHz, f2=900.2 MHz, LO=800 MHz → IF fundamentals at 100.1 and 100.2 MHz, IM3 at 100.0 and 100.3 MHz. Signal generators must have >30 dB isolation between them (use a hybrid combiner) to prevent mutual intermodulation.

💡 Never try to find the actual intercept point by increasing power until the extrapolated lines cross — the device would be in severe compression or damaged. Always extrapolate from measurements at power levels well below P1dB.
Q28
What is mixer desensitisation? How does a strong blocker reduce gain for the wanted signal?
MediumBlocking
Compression ΔG ≈ P_in − IIP1dB (dB above P1dB)
Sensitivity degrades by |ΔG| dB simultaneously

A large interferer pushes the mixer toward its P1dB. In compression, the weak wanted signal is converted with the same reduced gain as the strong blocker — its IF output power drops by ΔG dB, reducing SNR and degrading sensitivity. The receiver appears deaf even though the wanted signal is physically present.

💡 Desensitisation is the most common practical receiver problem in dense RF environments. Strong adjacent-channel signals from nearby WiFi APs compress receivers — perceived as slow WiFi, when the real cause is mixer compression, not low signal level.
Q29
What is the difference between a mixer and a multiplier? Can a multiplier serve as a mixer?
EasyBasics
Ideal multiplier: V_out = k×V1×V2 → only two outputs: f1+f2 and |f1−f2|, no harmonics
Real mixer: V_out = Σ A_mn×cos(m×ω_RF ± n×ω_LO)t — infinite harmonic products

A true linear multiplier produces only sum and difference — ideal mixer behaviour. The problem: building a linear multiplier at GHz frequencies is impractical. Diode/transistor mixers exploit intentional nonlinearity to generate mixing products, accepting harmonic spurs in exchange for high-frequency operation.

💡 At audio and low RF (<10 MHz), analog multiplier ICs (AD633, AD734) are used as true multipliers for AM modulation and phase detection. At microwave, they are replaced by switching mixers and Gilbert cells.
Q30
What is port impedance matching in a mixer? Why does mismatch cause more than just return loss?
MediumMatching

Beyond simple power transfer loss, impedance mismatch at mixer ports has three additional effects:

  • Conversion loss sensitivity: Passive diode mixer CL is sensitive to RF port VSWR — even 2:1 VSWR can add 1–2 dB excess loss beyond the resistive mismatch alone
  • Image-band noise: Poor RF port match at the image frequency reflects image-band thermal noise back into the mixer, adding up to 3 dB to the noise figure
  • IF port termination: Passive mixers behave as a current source — the IF load impedance affects conversion efficiency. Improper IF termination degrades specified conversion loss
💡 Use a diplexer at the IF port — a network presenting 50 Ω at both the IF band AND the image frequency band. This ensures the mixer always sees a correct termination at all relevant frequencies, achieving the specified conversion loss and noise figure independent of what IF filter follows.
Q31
What is a poly-phase filter? How does it generate quadrature LO signals for an IQ mixer?
HardIQ Generation
Single-stage RC poly-phase: 4 outputs at 0°, 90°, 180°, 270° at ω=1/(RC) only
Multi-stage (N stages): extends 90° accuracy over bandwidth at cost of ~3 dB/stage loss
Alternative: divide-by-2 — VCO at 2×f_LO, D flip-flop produces inherent exact 90°

A polyphase filter is a passive RC ring network that accepts a differential input and produces four outputs with 90° phase separation. Accuracy is excellent at exactly ω=1/RC but degrades away from this frequency. Multi-stage designs extend bandwidth.

Preferred method in modern CMOS: Run VCO at 2×f_LO, divide by 2 with a D flip-flop. Produces inherently 50% duty cycle and exact 90° quadrature. Also reduces VCO phase noise by 6 dB (20·log₁₀(2)).

💡 The divide-by-2 approach has an elegant bonus: VCO phase noise improves by 6 dB after division. A VCO at 9.6 GHz divided to 4.8 GHz has 6 dB better phase noise than a direct 4.8 GHz VCO — making the 2×VCO+divider architecture universally adopted in WiFi and cellular chipsets.
Q32
Calculate cascaded NF for LNA (G=15 dB, NF=1.5 dB) followed by a mixer (CL=7 dB, NF=7 dB).
MediumNoise Cascade
Friis: F_total = F1 + (F2−1)/G1
F_LNA=10^(1.5/10)=1.413, G_LNA=10^(15/10)=31.62, F_mixer=10^(7/10)=5.012
F_total = 1.413+(5.012−1)/31.62 = 1.413+0.127 = 1.540
NF_total = 10·log₁₀(1.540) = 1.88 dB

The mixer contributes only 0.127 noise factor units — less than 0.4 dB. The LNA's 15 dB gain suppresses the mixer's noise by a factor of 31×. Without the LNA: NF = 7 dB. With it: 1.88 dB — a 5.12 dB sensitivity improvement.

💡 The Friis formula tells you: the first stage dominates system NF. Every 0.1 dB of LNA NF improvement directly improves sensitivity by 0.1 dB. The mixer NF matters far less once sufficient LNA gain precedes it — which is why so much effort goes into LNA design.
⚡ RX Chain Designer — full cascade
Q33
What is spurious-free dynamic range (SFDR)? Calculate for mixer IIP3=+5 dBm, NF=7 dB, BW=1 MHz.
HardDynamic Range
Noise floor: P_n = kTB + NF = −174+60+7 = −107 dBm
SFDR = (2/3)×(IIP3 − P_n) = (2/3)×(5−(−107)) = (2/3)×112 = 74.7 dB

SFDR is the input dynamic range over which the mixer operates without IM3 products rising above the noise floor. Below SFDR: signal detectable. At SFDR: IM3 = noise floor. Above SFDR: IM3 dominates. The (2/3) factor comes from the 1:1 fundamental slope vs 3:1 IM3 slope meeting at the IIP3 extrapolation point.

💡 Improving IIP3 by 3 dB improves SFDR by 2 dB. Improving NF by 3 dB also improves SFDR by 2 dB — both are equally effective. SFDR is especially important in EW receivers, spectrum analysers and SDRs that must detect weak signals alongside strong interferers.
Q34
Design a mixer stage for a 2.4 GHz WiFi receiver: LNA output −65 dBm, IF=100 MHz. Select mixer type, LO frequency, estimate cascaded NF and IIP3.
HardDesign

LO: f_LO = 2300 MHz (low-side injection). Image at 2200 MHz — preselector must attenuate by ≥50 dB.

Mixer selection: Active CMOS IQ Gilbert cell for integrated WiFi chip. At −65 dBm input level, well below compression.

LNA: G=15 dB, NF=1.5 dB, IIP3=−5 dBm   Mixer: CG=+8 dB, NF=12 dB, IIP3=0 dBm
Cascaded NF: F=1.413+(15.85−1)/31.62=1.413+0.470=1.883 → NF=2.75 dB
Cascaded IIP3: 1/IIP3=1/0.316+31.62/1=34.78 → IIP3=0.0288 mW → −15.4 dBm

This design is mixer-dominated in IIP3. To improve: reduce LNA gain by 3 dB → IIP3 improves to ~−13 dBm, NF degrades to ~3.2 dB. This NF-linearity tradeoff is the fundamental LNA design optimisation problem.

💡 IEEE 802.11 requires sensitivity at −82 dBm with a −15 dBm adjacent-channel blocker. This system just meets it. A 3 dB margin requires either lower LNA gain or a higher-linearity mixer — a real design iteration that occurs in every WiFi chipset development.
⚡ RX Chain Designer
Q35
Full system: LNA (G=18 dB, NF=1.2 dB, IIP3=−5 dBm) + Mixer (CL=6 dB, NF=6 dB, IIP3=+10 dBm). Calculate cascaded NF, IIP3 and SFDR at 20 MHz BW. Is it noise or linearity limited?
HardSystem Design
Cascaded NF:
F=1.318+(3.981−1)/63.1=1.318+0.047=1.365 → NF=1.35 dB

Cascaded IIP3:
IIP3_mix_input_referred = 10−18 = −8 dBm = 0.158 mW
1/IIP3_total = 1/0.316 + 1/0.158 = 3.16+6.33 = 9.49 → IIP3=0.105 mW → −9.8 dBm

Noise floor (20 MHz BW): P_n = −174+73+1.35 = −99.65 dBm
SFDR = (2/3)×89.85 = 59.9 dB

Linearity limited — the IIP3 of −9.8 dBm is poor relative to the excellent NF of 1.35 dB. The mixer's IIP3 input-referred through the 18 dB LNA dominates (−8 dBm contribution vs LNA's −5 dBm). Fix: reduce LNA gain 3 dB → IIP3 improves to ~−7.5 dBm, NF degrades to ~1.8 dB. This gain-NF-linearity tradeoff is the heart of LNA design.

💡 Optimal gain distribution: each stage's IIP3 referred to the input should contribute roughly equally to cascaded IIP3. If the mixer dominates, reduce LNA gain or use a higher-linearity mixer. This iterative process is how RF system designers finalise the gain plan before selecting components.
⚡ RX Chain Designer — full cascade