// AGC System Specifications
dB
dB
dB
V
V
dB
dB
MHz
ms
dBm
// Design Notes
Dynamic range = Gmax − Gmin
AGC must handle Pin = Pout,target − Gmax to Pout,target − Gmin

Log control law: ΔG/ΔVctrl = constant (dB/V)
→ Same dB step for each volt of control
Lin control law: G ∝ Vctrl
→ Poor resolution at low gains

NF vs gain trade-off:
At low gain, first-stage NF dominates — system NF rises
Fsys = F1 + (F2−1)/G1 + …
With VGA at front: Fsys rises as GVGA decreases

Settling time: determines AGC loop bandwidth
BWloop ≈ 0.35/tsettle
Architecture tip: Place the VGA after the LNA to preserve noise figure at all gain settings. Use multiple gain stages (e.g. IF attenuator + baseband VGA) to cover the required dynamic range without compromising NF.
// AGC Design Results
Gain Control
Total gain control range
Number of gain steps
Control sensitivity
Resolution (bits needed)
Dynamic Range
Min detectable signal Pmin
Max input signal Pmax
Input dynamic range
Noise floor (at Gmax)
NF vs Gain
NF at Gmax (high gain)
NF at Gmin (low gain)
NF change over range
Loop & Timing
AGC loop BW
Loop filter capacitor (est.)
// Gain vs Control Voltage
Log law Linear law
// Gain Setting Summary (selected steps)
Gain (dB)Vctrl (log)Vctrl (lin)NF (est.)Pin target